In recent years, with advancement of digital technologies, electronic hardware such as portable information devices and information home appliance have been developed to provide higher speeds and higher functionalities. With progresses of higher-speed and highly-functional electronic hardware, there has been an increasing demand for fuses with several hundreds bit level for regulation after completion of LSI or system boards.
The fuses have a wide variety of uses such as numerous process products and generation LSI such as state-of-the-art CMOS and bipolar CMOS analogs. Therefore, it is required that the fuses be easily applied to devices and processes.
Under the circumstances in which there have been such demands, electric fuse elements, polysilicon fuse elements, laser fuse elements and so on have been conventionally used. But, these fuse elements can overwrite only once in an operation principle.
An exemplary application of nonvolatile elements to fuses is a flash memory or a ferroelectric memory. These memories require many additional masks to process of the existing CMOS, for example, five to ten additional masks, which has a disadvantage in cost performance and provides low compatibility with other processes.
These days, as a use of the fuses, there has been proposed three-dimensional nonvolatile elements in cross-point array, comprising memory cells each including a resistance variable memory and a polycrystalline silicon diode which are stacked together (see patent document 1).
FIG. 32 shows a cross-section of a semiconductor device 10 of the proposed use. To be specific, a memory cell is constituted by a pillar 17 including a diode 18. The diode 18 is provided on a ReRAM stack 20 having a MIM structure composed of an upper electrode 66, a resistance variable layer 68, and a lower electrode 70. The ReRAM stack 20 is provided on a bit line 22, and the diode 18 is provided under a word line 12. As desired, a barrier layer 19 is provided between the ReRAM stack 20 and the diode 18. The cross-point of the bit line 22 and the word line 12 serves as the memory cell in the cross-point array.